Presentation
The New Era of Processor Design Innovation: RISC-V
DescriptionRISC-V is a fascinating new idea in CPU design. With a free instruction set specification, hardware designers can explore new ideas in CPU design and provide flexibility in accelerators of all kinds, without incurring costs to license a modifiable architecture. The standardized instruction set provides a solid base for compiler, operating system, and standard library development that can be leveraged by every hardware design. Initial CPUs based on the RISC-V instruction set were targeted at embedded computing. But recently, high-performance CPUs have become commercially available and truly high-performance clusters are now being planned.
This session, led by an HPC/AI expert, will invite researchers, innovators, and users to discuss experiences with RISC-V, where they see the market and design going in the future as implementation from Asian and European companies soars, and present a realistic assessment of the state of products and timeline for HPC and AI performant hardware and software.
This session, led by an HPC/AI expert, will invite researchers, innovators, and users to discuss experiences with RISC-V, where they see the market and design going in the future as implementation from Asian and European companies soars, and present a realistic assessment of the state of products and timeline for HPC and AI performant hardware and software.
Presenter