Presentation
Exploring CXL 3.1-Enabled Composable Servers: Building Blocks for Next-Generation HPC Systems
DescriptionCompute express link (CXL) is gaining attention as a practical solution that can reduce total cost of ownership (TCO) of HPC and datacenters while providing reasonable performance. In this presentation, we will introduce how to utilize the recent version of CXL technology, CXL 3.1, to construct a composable HPC server and how the CXL 3.1-enabled composable server can accelerate practical HPC applications.
The composable server consists of CPU and memory nodes. Since each node features a CXL 3.1 switch that supports multi-level switching and port-based routing, it can connect multiple nodes with flexibility. Using this composable server, we will demonstrate the effectiveness of CXL 3.1 technology. To this end, we will show a demo running practical HPC applications (e.g., atomic-level simulation) on the CXL 3.1 composable server. Our demo shows that the CXL-based server outperforms the conventional system by about 1.8 times, through the utilization of memory sharing features.
The composable server consists of CPU and memory nodes. Since each node features a CXL 3.1 switch that supports multi-level switching and port-based routing, it can connect multiple nodes with flexibility. Using this composable server, we will demonstrate the effectiveness of CXL 3.1 technology. To this end, we will show a demo running practical HPC applications (e.g., atomic-level simulation) on the CXL 3.1 composable server. Our demo shows that the CXL-based server outperforms the conventional system by about 1.8 times, through the utilization of memory sharing features.
Presenter
Event Type
Exhibitor Forum
TimeThursday, 21 November 202411:30am - 12pm EST
LocationB206
Hardware Technologies
TP
XO/EX
Archive
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