Presentation
ACID Support for Compute eXpress Link Memory Transactions
DescriptionThe need to support a large volume of transactions on shared data is increasing to meet explosive growth in worldwide data and processing demands. Emerging memory architectures such as CXL are increasing in popularity; CXL allows for dynamic demand-sensitive resizing of aggregated memory, support for heterogeneous memory types, and sharing of data amongst supported processors and devices. However, while this new memory architecture alleviates many concerns in datacenter and HPC architectures, data integrity when using memory-based transactions over CXL faces many challenges.
To solve for these challenges, we describe a novel solution for providing ACID (Atomicity, Consistency, Isolation, Durability) transactions in a CXL-based memory architecture. We call this solution Transactional CXL, or TCXL, which requires no changes to the existing processor microarchitectures and is implemented in a software library with a back-end controller that can be embedded in a CXL controller, as a stand-alone CXL device, or host implemented.
To solve for these challenges, we describe a novel solution for providing ACID (Atomicity, Consistency, Isolation, Durability) transactions in a CXL-based memory architecture. We call this solution Transactional CXL, or TCXL, which requires no changes to the existing processor microarchitectures and is implemented in a software library with a back-end controller that can be embedded in a CXL controller, as a stand-alone CXL device, or host implemented.