Presentation Full Schedule · Contributors · Organizations · Search Program · My Schedule · Happening NowMore…Search ProgramMy ScheduleHappening Now SIGN IN TO VIEW THIS PRESENTATION Sign In Performance portability via C++ PSTL, SYCL, OpenMP, and HIP: the Gaia AVU-GSR case studySession2024 International Workshop on Performance, Portability, and Productivity in HPCDescriptionAuthor/PresentersGiulio MalenzaUniversity of Torino, ItalyValentina CesareNational Institute for AstrophysicsMarco Edoardo SantimariaUniversity of Torino, ItalyRobert BirkeUniversity of Torino, ItalyAlberto VecchiatoNational Institute for AstrophysicsUgo BeccianiNational Institute for AstrophysicsMarco AldinucciUniversity of Torino, ItalyEvent TypeWorkshopgive feedbackTimeMonday, 18 November 20242:23pm - 2:46pm ESTLocationB306TagsPerformance OptimizationProgramming Frameworks and System SoftwareRegistration Categories W Archive view Next PresentationNext PresentationPerformance Portable Optimizations of an Ice-sheet Modeling Code on GPU-supercomputersSimilar PresentationsExploring SYCL for batched kernels with memory allocationsHigh-Performance, Scalable Geometric Multigrid via Fine-Grain Data Blocking for GPUsLeveraging AI to port from legacy Fortran to GPU enabled C++
