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Biography
Jeffrey Young is a principal research scientist with Georgia Tech’s Partnership for Advanced Computing Environments (PACE). With a background in computer architecture, his main research interests have focused on the intersection of high-performance computing and novel accelerators including GPUs, FPGAs, and next-generation processors. He is the director of a novel architecture testbed, the CRNCH Rogues Gallery, that aims to simplify and democratize access to novel post-Moore accelerators in the neuromorphic, reversible, and smart networking spaces. He received his PhD in computer engineering in 2013 from Georgia Tech's ECE department.
Presentations
Tutorial
Accelerators
Architecture
Emerging Technologies
Network
TUT
Paper
Accelerators
Algorithms
Data Movement and Memory
Graph Algorithms
TP
Workshop
Software Engineering
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