Close

Session

Workshop: IA^3 2024 - 14th Workshop on Irregular Applications: Architectures & Algorithms
DescriptionDue to the heterogeneous datasets they process, data-intensive applications employ diverse methods and data structures, exhibiting irregular data accesses, control flows, and communication patterns. Modern data analytics applications additionally require supporting dynamic data structures, asynchronous control flows, and mixed parallel programming models. Supercomputing systems are organized around software and hardware optimized for data locality and bulk synchronous computations. Managing irregular behaviors requires a substantial programming effort and lacks integration, leading to poor performance. Holistic solutions to these challenges emerge only by considering the problem from multiple perspectives: from micro- to system-architectures, from compilers to languages, from libraries to runtimes, and from algorithm design to data characteristics. Only collaborative efforts among researchers with different expertise, including domain experts and end-users, can lead to significant breakthroughs. This workshop brings together scientists with different backgrounds to discuss methods and technologies for efficiently supporting irregular applications on current and future architectures.
Event TypeWorkshop
TimeSunday, 17 November 20249am - 5:30pm EST
LocationB310
Tags
Graph Algorithms
Heterogeneous Computing
Programming Frameworks and System Software
Registration Categories
W
Presentations
9:00am - 9:05am ESTWelcome and Introduction
9:05am - 9:50am ESTInvited Talk: Accelerating Irregular Algorithms on GPUs
9:50am - 10:00am ESTBatch Updates of Distributed Streaming Graphs using Linear Algebra
10:00am - 10:30am ESTIA^3 — Morning Break
10:30am - 10:55am ESTEstablish the basis for Breadth-First Search on Frontier System: XBFS on AMD GPUs
10:55am - 11:20am ESTxBS-GNN: Accelerating Billion-Scale GNN Training on FPGA
11:20am - 11:45am ESTEnhancing Scalability and Performance in Influence Maximization with Optimized Parallel Processing
11:45am - 11:55am ESTEnhancing Small Message Aggregation with Directive-Based Deferred Execution
11:55am - 12:05pm ESTShared Memory-Aware Latency-Sensitive Message Aggregation for Fine-Grained Communication
12:05pm - 12:30pm ESTNEO-DNND: Communication-Optimized Distributed Nearest Neighbor Graph Construction
12:30pm - 2:00pm ESTIA^3 — Lunch Break
2:00pm - 2:40pm ESTInvited Talk: Discussion on Hash-Table Approaches for Efficient Sparse Tensor Contraction
Presenter
2:40pm - 2:50pm ESTAn Adaptive Asynchronous Approach for the Single-Source Shortest Paths Problem
2:50pm - 3:00pm ESTGPU Accelerated Sparse Cholesky Factorization
3:00pm - 3:30pm ESTIA^3 — Afternoon Break
3:30pm - 3:55pm ESTEfficient Tree-based Parallel Algorithms for N-Body Simulations Using C++ Standard Parallelism
3:55pm - 4:20pm ESTLinear Algebra Approach for Directed Triad Counting and Enumeration
4:20pm - 4:30pm ESTPerformance evaluation and modelling of single-precision matrix multiplication on Cerebras CS-2
4:30pm - 4:40pm ESTPerformance Analysis of the NICAM Benchmark on MN-Core Processor
4:40pm - 4:50pm ESTPredicting Compute Node Unavailability in HPC: A Graph-Based Machine Learning Approach
Author/Presenter
4:50pm - 5:29pm ESTIA ^3 Debate
5:29pm - 5:30pm ESTConcluding Remarks