Session
International Workshop on RISC-V for HPC (RISCVHPC)
Session Chairs
Event TypeWorkshop
TimeMonday, 18 November 20242pm - 5:30pm EST
LocationB315
Accelerators
Emerging Technologies
Hardware Technologies
W
Presentations
2:00pm - 2:40pm EST | Invited talk: Why I chose to built Esperanto's AI and HPC accelerator around RISC-V Presenter | |
2:40pm - 2:50pm EST | Vendor talk: InspireSemi Presenter | |
2:50pm - 3:00pm EST | Vendor talk: Tenstorrent Presenter | |
3:00pm - 3:30pm EST | RISCVHPC — Afternoon Break | |
3:30pm - 3:50pm EST | HPC from the RISC-V International perspective Presenter | |
3:50pm - 4:10pm EST | Preparing for HPC on RISC-V: Examining Vectorization and Distributed Performance of an Astrophyiscs Application with HPX and Kokkos | |
4:10pm - 4:30pm EST | Top-Down Microarchitecture Analysis Approximation Based on Performance Counter Architecture for SiFive RISC-V Processors | |
4:30pm - 4:50pm EST | Web-Based Simulator of Superscalar RISC-V Processors | |
4:50pm - 5:10pm EST | Accelerating stencils on the Tenstorrent Grayskull RISC-V accelerator | |
5:10pm - 5:20pm EST | Development of Fedora Linux Distribution for RISC-V (RV64G) Architecture | |
5:20pm - 5:30pm EST | Vendor talk: E4 Computer Engineering Presenter |