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UID:submissions.supercomputing.org_SC24_sess370_pap369@linklings.com
SUMMARY:LoRAStencil: Low-Rank Adaptation of Stencil Computation on Tensor 
 Cores
DESCRIPTION:Yiwei Zhang (University of the Chinese Academy of Sciences, Mi
 crosoft Research); Kun Li (Microsoft Corporation); Liang Yuan (CAS); Jiawe
 n Cheng (Tsinghua University, China); Yunquan Zhang (CAS); and Ting Cao an
 d Mao Yang (Microsoft Corporation)\n\nStencil computations play a pivotal 
 role in numerous scientific and industrial applications, yet their efficie
 nt execution on specialized hardware accelerators like Tensor Core Units (
 TCUs) remains a challenge. This paper introduces LoRAStencil,  a novel ste
 ncil computing system designed to mitigate memory access redundancies on T
 CUs through low-rank adaptation. We first identify a nuanced form of this 
 redundancy, dimension residue, specific to TCUs. Then LoRAStencil leverage
 s orchestrated mathematical transformations to decompose stencil weight ma
 trices into smaller rank-1 matrices, facilitating efficient data gathering
  along residual dimensions. It comprises three key components: memory-effi
 cient Residual Dimension Gathering to facilitate more data reuse, compute-
 saving Pyramidal Matrix Adaptation to exploit the inherent low-rank charac
 teristics, and performance-boosting Butterfly Vector Swapping to circumven
 t all data shuffles. Comprehensive evaluations demonstrate that LoRAStenci
 l address dimension residues effectively, which outperforms state-of-the-a
 rts with up to a 2.16x speedup, offering promising advancements for effici
 ent tensorized stencil computation on TCUs by Low-Rank Adaptation.\n\nTag:
  Accelerators, Algorithms, Data Compression, Linear Algebra, Tensors\n\nRe
 gistration Category: Tech Program Reg Pass\n\nSession Chair: Rio Yokota (I
 nstitute of Science Tokyo)\n\n
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