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DTSTAMP:20260422T143139Z
LOCATION:B303
DTSTART;TZID=America/New_York:20241118T143000
DTEND;TZID=America/New_York:20241118T150000
UID:submissions.supercomputing.org_SC24_sess748_ws_pmbsf131@linklings.com
SUMMARY:AI-Assisted Design-Space Analysis of High-Performance Arm Processo
 rs
DESCRIPTION:Joseph Moore, Tom Deakin, and Simon McIntosh-Smith (University
  of Bristol, England)\n\nThis work quantifies the impact of microarchitect
 ural features in modern high-performance Arm CPUs. To combat a parameter s
 pace that is too large to traverse naively, we employ a decision tree regr
 ession machine learning model to predict the number of execution cycles wi
 th 93.38% accuracy compared to the simulated cycles. We build on previous 
 work by specializing our design to real-world HPC workloads and modernize 
 our approach with updated search spaces, improved simulation frameworks, a
 nd over 180,000 simulated data points. We find empirically that vector len
 gth typically has the largest impact on HPC code performance at 25.91% of 
 our performance weighting, followed by memory performance across all level
 s of the memory hierarchy, and the size of the reorder buffer and register
  files. Our results motivate deeper exploration of these parameters in bot
 h hardware design and simulation, as well as advancing the modelling of ar
 chitectural simulation through the use of machine learning.\n\nTag: Accele
 rators, Modeling and Simulation, Performance Evaluation and/or Optimizatio
 n Tools\n\nRegistration Category: Workshop Reg Pass\n\nSession Chairs: Sim
 on Hammond (National Nuclear Security Administration (NNSA)); Sascha Hunol
 d (Technical University of Vienna); and Steven A. Wright (University of Yo
 rk, England)\n\n
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