BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/New_York
X-LIC-LOCATION:America/New_York
BEGIN:DAYLIGHT
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
TZNAME:EDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
TZNAME:EST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20250626T234541Z
LOCATION:B314
DTSTART;TZID=America/New_York:20241118T092000
DTEND;TZID=America/New_York:20241118T094000
UID:submissions.supercomputing.org_SC24_sess758_misc383@linklings.com
SUMMARY:The UpDown System: A Scalable Supercomputer co-designed for Graph 
 Computations
DESCRIPTION:Andrew Chien (University of Chicago)\n\nThe UpDown system’s go
 al is to reduce programming complexity AND improve scalability on graph co
 mputations.  UpDown is codesigned for fine-grained parallelism and efficie
 nt global communication; early performance studies using graph kernels ind
 icate a single UpDown node can outperform a multicore CPU by up to 100x. T
 he 16,384-node UpDown system achieves strong scaling on small graphs with 
 projected performance of 1,000x today’s supercomputers and cloud for Pager
 ank, Triangle Count, and more. Iso-power comparisons are more favorable.<b
 r /><br />The UpDown system architecture is a significant departure. First
 , UpDown’s 1-cycle thread creation and management, combined with hardware 
 scheduling enables trillions of fine-grained computations (<25 instruction
 s, MIMD) to achieve high hardware efficiency. Second, UpDown provides effi
 cient short messages. Features include 1-cycle message sends, NIC-less des
 ign (scalability), and split-transaction memory access that enable softwar
 e-controlled intelligent data movement. Third, UpDown has >4TB/s per-node 
 of all-to-all network bandwidth and global memory access latency of 1.1 us
 . Radically higher network capability opens new spaces for graph algorithm
 s and data structures, as the system can be programmed as a flat, global m
 emory machine. Finally, UpDown has massive memory bandwidth (10 TB/s/node 
 and 150 PB/s system). Together, these capabilities enable high-level progr
 amming of vertex and edge parallelism for scalable high performance. The U
 pDown project is part of the IARPA’s AGILE research program.\n\nTag: Artif
 icial Intelligence/Machine Learning, Codesign\n\nRegistration Category: Wo
 rkshop Reg Pass\n\nSession Chairs: John Feo (Pacific Northwest National La
 boratory (PNNL)), Jiyuan Zhang (Meta), and Amelie Chi Zhou (Hong Kong Bapt
 ist University)\n\n
END:VEVENT
END:VCALENDAR